74hc590-spice-model

74HC590 SPICE Macro Model. The 74HC590 is an 8-bit binary counter with a storage register and 3-state outputs. Propagation Delay Time: 75 ns, 22 ns, and 17 ns at VCC = 2 V, 4.5 V, and 6 V, respectively (from CCK to RCO). Output Drive Capability: ±6 mA (QA through QH) and ±4 mA (RCO) at VCC = 5 V. The storage register provides parallel, three-state outputs (QA to QH). The binary counter includes master reset (CCLR) and count enable (CCKEN) inputs. The counter and storage register are driven by separate, positive-edge-triggered clock inputs (CCK and RCK). When both clocks are tied together, the counter state will always be one count ahead of the register. Internal circuitry prevents unintended clocking via the count enable input. A ripple carry output (RCO) is available for cascading. To cascade multiple stages, connect the RCO of the preceding stage to the CCKEN input of the subsequent stage.

Toshiba TC74HC590A 8-Bit Binary Counter With Register Macro Model